Synthesis and Estimation of Memory Interfaces for FPGA-based Reconfigurable Computing Engines
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چکیده
As the densities of current FPGA continue to grow it is now possible to generate System-On-a-Chip (SoC) designs where multiple computing cores are connected to various memory modules with customized topology with application specific memory access patterns. For example, Xilinx has recently introduced devices to which a paired down version of a PowerPC core can be mapped and connected to a set of internal memories.
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تاریخ انتشار 2003